Integrated circuits are generally fabricated by patterning a succession of spatially related layers on a substrate. The patterned layers form electronic devices and interconnections, separated by insulating materials. Conventional materials for integrated circuits include conducting materials such as aluminum, copper, and polysilicon, semiconducting materials such as p- and n-doped silicon, and insulating materials such as silicon dioxide and silicon nitride.
A number of dice may be patterned on a substrate such as a silicon wafer, where each die includes an integrated circuit with a number of connection points for making electrical contact with the integrated circuit. Each die may then be electrically and structurally connected to a packaging substrate.
For example, after a passivation step, an array of bumps may be formed on the connection points of a die. The bumps may be formed by electroplating a bump material (e.g., a lead-tin material, or copper) on a base layer metal (BLM) material.
After separating the die from the wafer, the array of bumps may be aligned with complementary solder bumps on a packaging substrate. The system may be heated so that the solder flows, connecting the die to the packaging substrate.
Like reference symbols in the various drawings indicate like elements.